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Innovative Sub-resolution Technique

Successful process development, using existing equipment, extended beyond its defined specification limits is a tribute to a process engineer’s innovative creativity.

ASML 5500/100 Process Development: Innovative Sub resolution technique

Successful process development, using existing equipment, extended beyond its defined specification limits is a tribute to a process engineer’s innovative creativity. Frequently, a photolithographic process engineer is requested to develop processes that require photoresist features with resolution beyond existing exposure tools limitations. These features are defined as sub-resolution, since they are smaller that the optics can theoretically produce. These projects are designed to test the validity and feasibility of different device architectures for innovative products without investing in new equipment. The goal typically is to create a prototype device for testing the ideas behind the new product. This process can be used to create isolated linewidths used in the development of MEMS sensors, optical waveguides, transistor gates, and metal connectors for example.

A technique using a reticle with a clear rectangle areas was used to successfully create 200nm isolated photoresist linewidths. The technique involves photo-composition using the clear area reticle patterns and stepping them from adjacent positions towards each other creating an un-exposed gap between the open area pattern edges. One simply uses the interferometric stage positioning and the reticle open pattern edges to create isolated linewidths. The photoresist process and the repeatability of the waferstage determines the CD’s variation. The stage repeatability for ASML 5500/xxx models is 15 nm.


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 Photoresist Trim Process to create sub-resolution isolated photoresist linewidths. (Source: Simax)

Simax has developed multiple innovative processing techniques designed to create photoresist features that are sub-resolution. Contact Simax Applications Engineering for innovative techniques used for process and product development.
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Brainerd
Steve Brainerd is a Senior Applications Engineer with Simax Lithography. With over 30 years “hands-on” wafer fabrication experience concentrated in semiconductor wafer, MEMs, thick photoresist, solar, and LCD fabrication manufacturing processes, Steve uses his strong analytical skills to develop robust processes for customers. His knowledge and experience include process-equipment startup, process development, process modeling, anti-reflection coating design/modeling, cost reduction, yield improvement, and capacity increases.