Best Solutions
| 21 January 2010
How to improve edge die process latitude and enhance yield
For many device manufacturers, maintaining good edge die yield, has been, and in many cases still is, extremely challenging. The reasons for edge die yield loss are numerous e.g. Edge Bead Removal (EBR) width variability, poor etch uniformity and contamination from thin film deposition wafer clamping mechanisms. In this month’s “Best solutions” we concentrate on the lithography aspects of edge die yield loss, with possible solutions and metrics to prove that the solution actually works.
In the lithographers' tool box there are many different “knobs” to turn to achieve a production worthy lithography process. Most lithography engineers work with quality metrics such as Cp & CpK (a measure of process capability), and strive to reach a target value of 2.0, which ensures production Critical Dimension Uniformity (CDU) meets device specifications. This is achieved by optimizing exposure and defocus process windows (ED windows) - beyond which, yield will suffer. Unfortunately, these optimized process windows are often found to be inadequate when there are chuck contamination issues, or feed forward corrections from level sensor inner die measurements, that do not accurately predict the Rx, Ry and Z loci of the wafer focal plane.
Simax Lithography can provide improved exposure chucks for legacy tools, such as ASML 5500 steppers and scanners. These e-chuck modifications include: new pimple layouts, reduced contact areas, harder wearing materials, and an increase in the diameter of the outer vacuum ring to better support the wafer edge. The larger diameter outer vacuum ring provides a “prevention is better than cure” approach so that the lithographer can now realize the center of the ED window across the entire wafer area.

How does one prove that this new hardware is effective without waiting until final e-test edge die yield data to become available? One possibility could be to use the Benchmark PSFM reticle http://www.benchmarktech.com/PSFM.htm , this enables the lithographer to actually measure the height of any location on the wafer surface very accurately, especially at the wafer edge. This method has been well reported, and coupled with edge die CDU measurements, could provide a very useful quantitative method of proving the edge die process latitude improvement. Moreover, since the lithographer knows the maximum Depth Of Focus (DOF) for any critical lithography process step, the difference in edge focus height variation translates directly to yield as soon as it exceeds the ED window DOF specification. Simax Lithography Applications will be investigating the benefits of the new e-chucks with a number of customers. It is anticipated that the results of the studies will be published in a future “Best solutions”.
If you are interested in participating in such a study, please
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How to improve edge die process latitude and enhance yield
For many device manufacturers, maintaining good edge die yield, has been, and in many cases still is, extremely challenging. The reasons for edge die yield loss are numerous e.g. Edge Bead Removal (EBR) width variability, poor etch uniformity and contamination from thin film deposition wafer clamping mechanisms. In this month’s “Best solutions” we concentrate on the lithography aspects of edge die yield loss, with possible solutions and metrics to prove that the solution actually works.
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